Design and Implementation of the Read Out Controller for the GET4 TDC of the CBM ToF Wall Prototype
نویسندگان
چکیده
The Time of Flight detector of the CBM experiment will assemble about 12 500 GET4 ASICs [1]. Those chips give a very precise timestamp (resolution better than 25 ps) to detected hits and then deliver the data (24 bits/hit) via a serial LVDS link to the Read Out Controller (ROC). At the moment, the FPGA of one ROC interfaces up to 14 GET4 chips. However, the current hardware allows up to 28 GET4 chips and even more should be possible with the new generation of ROCs. In addition to the combination and synchronization of the data from all GET4 chips into one data stream, the ROC has to provide a control interface for all the chips.
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